Prof. Xu

Curriculum Vitae

Gaowei Xu received the B.S. and M.S. degrees in electronics materials and components from Xidian University, Xi’an, China, in 1990 and 1993 respectively and received the Ph. D. degree in microelectronics and solid-state electronics from Shanghai Institute of Microsystems and Information Technology (SIMIT), Chinese Academy of Sciences (CAS), Shanghai, in 2007. He is currently associate professor in SIMIT, CAS. He engaged in the field of advanced electronic package in 1990. Now, he is working in the National Key Lab of Microsysytem Technology in SIMIT. He has published more than 50 research papers on electronic packaging and reliabilities and applied for more than 50 patents relating to flip-chip (FC), multi-chip module(MCM), system in package (SiP), wafer-level package (WLP) and through silicon via (TSV), etc. His current research involves advanced electronics packaging including 3D-MCM, 3D-SiP and WLP, etc. and reliabilities of advanced packages. He won the Best Paper Award of 8th International Conference on Electronics Packaging Technology (IEEE-ICEPT) in 2007.

Publikationen (international, typical)

1. Gaowei Xu, Fei Geng, Qiuping Huang, Le Luo, Jian Zhou, Warpage Study of a 3D-MCM on an Embedded Substrate with Multiple Interconnection Method, IEEE Transactions on Components and Packaging Technologies, Vol.33, No.3, pp.571-581, 2010.
2. Gaowei Xu, Yingjun Cheng and Le Luo, Heat Transfer Characteristics and Design Optimization for a Small-sized Plate-fin Heat Sink Array, ASME Journal of Electronics Packaging, Vol.129, No.4, pp.518-521, 2007.
3. Qiuping Huang, Gaowei Xu, Yuan Yuan, Xiao Cheng and Le Luo，Development of Indium Bumping Technology Through AZ9260 Resist Electroplating，Journal of Micromechanics and Microengineering,  20 (2010) 055035, pp.1-9, 2010.
4. Xiao Chen, Gaowei Xu and Le Luo, Development of seedlayer deposition and fast copper electroplating into deep microvias for 3D integration, Micro & Nano Letters, doi:10.1049/mnl.2012.0801, 2012.
5. Xiao Chen, Jiajie Tang, Gaowei Xu, Le Luo, Process development of a novel wafer level packaging with TSV applied in high-frequency range transmission. Microsystem Technologies, DOI:10.1007/s00542-012-1712-9,2012.
6. Xiao Chen, Peili Yan , Jiajie Tang, Gaowei Xu, Le Luo, Development of wafer level glass frit bonding by using barrier trench technology and precision screen printing, Microelectronic Engineering, 2012 (100): 6-11, 2012.
7. Fei Geng, Xiao-yun Ding, Gao-wei Xu and Le Luo, A wafer-scale packaging structure with monolithic microwave integrated circuits and passives embedded in a silicon substrate for multichip modules for radio frequency applications, Journal of Micromechanics and Microengineering, 19(2009) 105011, pp.1-9,2009.
8. Geng Fei, Ding Xiaoyun, Xu Gaowei, and Luo Le, A wafer-level 3D packaging structure with Benzocyclobutene as a dielectric for multichip module fabrication, Journal of Semiconductors, Vol.30, No.10,  pp.106003-1~106003-6,  2009.
9. Huang Qiuping, Xu Gaowei, Quan Gang, Yuan Yuan and Luo Le, Electroplated indium bump arrays and the bonding reliability, Journal of Semiconductors,Vol. 31, No. 11, pp.116004-1~116004-6, 2010.
10. Tianxi Wang, Mei Han, Gaowei Xu and Le Luo. Fabrication of a microstrip patch antenna integrated in low resistance silicon wafer using BCB dielectric. Journal of Semiconductor. Accepted, 2013.
11. Mei Han, Shuangfu Wang, Gaowei Xu, Le Luo. Suspended high Q integrated inductor by wafer level packaging technology. Microsystem Technologies. 2013.
12. Zhu, Chunsheng ; Ning, Wenguo; Li, Heng; Zheng, Tao; Xu, Gaowei; Luo, Le, Void control during plating process and thermal annealing of through-mask electroplated copper interconnects, MICROELECTRONICS RELIABILITY, 2014, 54( 4): 773-777.
13. Gaowei Xu, Shuangfu Wang, Chunsheng Zhu, Jiaotuo Ye, Wei Gai and Le Luo, Warpage Characteristics of Wafer-level Package of MEMS with Glass Frit Bonding, The 14th International Conference on Electronic Packaging Technology, 2013, pp.884-887.
14. Gaowei Xu, Peili Yan, Xiao Chen, Wenguo Ning, Le Luo, Jiwei Jiao, Wafer- level Chip-to-Wafer (C2W) Integration of High-Sensitivity MEMS and ICs, International Conference on Electronic Packaging Technology & High Density Packaging, 2011, pp.125-129, Shanghai, China, 2011.
15. Gaowei Xu, Enliang Song, Xiao Chen, Shuangfu Wang, Chunsheng Zhu, Jiaotuo Ye and Le Luo, System Integration for Miniature Node of Wireless Sensor Network (WSN), International Conference on Electronic Packaging Technology & High Density Packaging,  2012, pp. 94-96, Guilin, China,  2012.  
16. Chunsheng Zhu, Wenguo Ning, Jiaotuo Ye, Gaowei Xu, Le Luo, FEA Study of the Evolution of Wafer Warpage During Reflow Process in WLP, International Conference on Electronic Packaging Technology & High Density Packaging, August 13-16, 2012, pp. 661-665, 2012.
17. Gaowei Xu, Qiuping Huang, Yuan Yuan, Xiao Chen and Le Luo, Development of Flip-Chip Interconnections of Photodetector Readout Circuit (ROIC), 11th International Conference on Electronic Packaging Technology & High Density Packaging (ICEPT-HDP)，2010, pp.31-33.
18. Gaowei Xu, Qiuping Huang, Wenguo Ning, Zugang Ruan, Le Luo, A Novel MEMS Package with Three-Dimensional Stacked Modules, International Conference on Electronic Packaging Technology & High Density Packaging (ICEPT-HDP), 2009, pp.77-80.
19. Gaowei Xu, Yanhong Wu, Fei Geng, Qiuping Huang, Jian Zhou, Le Luo，Development of Three-dimensional Multichip Module Based on Embedded Substrate with Multiple Interconnections, 2008 International Conference on Electronic Packaging Technology & High Density Packaging (ICEPT-HDP 2008), 2008, pp.1-7.
20. Gaowei Xu, Jian Zhou, and Le Luo, "Warpage and Reliability of Three-dimensional Multi-chip Module with High Density Embedded Substrate ", ICEPT2007 Proceedings of 8th International Conference on Electronics Packaging Technology，2007, pp: 701-707.